What happens if I assign $latex I_1 $ counterclockwise and $latex I_2 $ clockwise?

Your KVL equations will be wrong. The shared branch term, which depends on the relationship between the two mesh currents, will have the wrong sign, and the system of equations will give you wrong values for $latex I_1 $ and $latex I_2 $ . This is one of the most common reasons students get mesh problems wrong even after putting full effort into the solution. Always assign the same direction to all loops.

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Kirchhoff’s Current Law (KCL)

Kirchhoff’s Current Law (KCL)

Wasim Asghar

Published: Sep 25, 2026

Two mesh loops sharing a common branch, showing opposite current directions I1 and I2 through the shared resistor

1. What Is Mesh Analysis and How Does It Relate to KVL?
2. KCL vs. Mesh Analysis: Knowing When to Use Each
3. The Four Steps of Mesh Analysis
4. The Two Rules That Determine Whether Your Analysis Is Correct
- Rule 1: Assign the Same Current Direction to All Loops
- Rule 2: Handle the Shared Middle Branch Correctly
5. Passive Sign Convention in KVL Loop Equations
- Resistors: Always a Voltage Drop
- Voltage Sources: Gain or Drop Depends on Current Direction
6. Fully Worked Practice Problem: Two-Loop Mesh Analysis
7. Common Mesh Analysis Mistakes on the FE Exam
8. KVL vs. KCL: The Bottom Line
Frequently Asked Questions
- Is mesh analysis in the FE Reference Handbook?
- Do I need to use mesh analysis on the FE exam, or can I always use KCL?
- What happens if I assign I₁ counterclockwise and I₂ clockwise?
- If I₂ comes out as zero, did I make an error?
- How does mesh analysis relate to the PE Power exam?
Related Articles

This guide covers mesh analysis, which is KVL applied at the loop level. Mesh analysis is not mentioned by name in the FE Reference Handbook. It is not handed to you on a formula sheet. But it shows up on the exam, and the engineers who struggle with it are almost always making one of two specific mistakes that have nothing to do with math ability.

In this guide, you will learn:

What mesh analysis is and how it relates to KVL
When mesh analysis is the right call versus KCL
The four-step mesh analysis method
The two rules that determine whether your analysis is correct or not
The passive sign convention applied to KVL loop equations
A fully worked two-loop problem with every step shown
Why a shaky understanding of mesh analysis can cost you more time than it saves

📊 FE Electrical Exam Weight: Where Mesh Analysis Fits

Mesh analysis falls under the Circuit Analysis section of the FE Electrical and Computer exam. Current NCEES® specifications list Circuit Analysis as Section 6, with approximately 11–17 questions out of 110. This section includes KCL, KVL, series/parallel equivalent circuits, Thevenin/Norton, node and loop analysis, waveforms, phasors, and impedance. That said, the KVL principles behind mesh analysis show up well beyond Section 6. You will run into them in electronics, power systems, and linear systems questions too.

1. What Is Mesh Analysis and How Does It Relate to KVL?

Mesh analysis is an extension of Kirchhoff’s Voltage Law (KVL). To understand mesh analysis, you first need to understand what KVL says.

KVL: Formal Statement

$\sum V_{\text{gain}} = \sum V_{\text{drop}} $

The sum of all voltage gains equals the sum of all voltage drops around any closed loop in a circuit.

Mesh analysis takes KVL and applies it systematically to each independent loop in a circuit, which we call a mesh. Instead of solving for node voltages the way KCL does, mesh analysis solves for loop currents, the mesh currents $I_1, I_2, I_3 $ and so on. Once you have all the mesh currents, you can find any voltage or branch current in the circuit using Ohm’s law.

One thing worth knowing up front: mesh analysis does not appear in the FE Reference Handbook, and it is not in the PE Power Reference Handbook either. There is no step-by-step procedure waiting for you in those references. You have to walk into that exam with the method built in through practice, not trying to find it in a reference handbook.

2. KCL vs. Mesh Analysis: Knowing When to Use Each

My go-to technique for circuit analysis, and the one I recommend to every FE Electrical and PE Power student, is KCL. It is the most reliable and flexible method. You can point it at any circuit on the exam and it works.

Mesh analysis has its place, but it comes with a condition. It works best on circuits that are set up for it. Specifically, mesh analysis is a good fit when:

The circuit has clearly defined, non-overlapping loops
The number of independent loops is small, typically two or three
You are solving for loop currents rather than specific node voltages
There are no current sources, or any current sources can be handled with a supermesh

If those conditions are not all met, KCL is the safer call. The table below lays out when to reach for each technique.

Situation	Use	Why
Circuit has clear, simple loops	Mesh Analysis	Loop equations are fast to write and solve
Circuit has multiple voltage sources	Mesh Analysis	KVL handles multiple sources cleanly within each loop
You need a specific branch current	KCL	KCL zeroes in on exactly the current you need
Circuit has current sources	KCL	Current sources require extra steps in mesh (supermesh)
You need voltage at a specific node	KCL	Node voltages are KCL’s direct output
You are unsure which to use	KCL	KCL works on any circuit, mesh needs the right setup

Bottom line: learn mesh analysis as a secondary technique. When a circuit clearly suits it, mesh is fast and clean. But if you are ever in doubt, go back to KCL. It works every time.

3. The Four Steps of Mesh Analysis

Mesh analysis follows a consistent four-step procedure. Run through these in the same order every time.

Identify the independent meshes in the circuit and count them. Each mesh gives you one KVL equation.
Assign a mesh current to each loop and pick a direction, either all clockwise or all counterclockwise. Label them $I_1, I_2, I_3 $ , and so on. Do not mix directions.
Write one KVL equation per mesh. Put all voltage gains on one side and all voltage drops on the other. Apply the passive sign convention to every element.
Solve the system of equations for the unknown mesh currents using your NCEES® approved calculator. Then calculate any remaining voltages or branch currents using Ohm’s law.

For Step 4, the three approved calculator families for the 2026 FE and PE exams are:

Casio: Any model with fx-115 or fx-991 in the name
Texas Instruments: Any model with TI-30X or TI-36X in the name
Hewlett Packard: HP 33s and HP 35s only

The TI-36X Pro and Casio fx-115ES Plus are the two most popular choices for solving simultaneous equations on exam day. Always confirm the current approved list at ncees.org before your exam, as NCEES® reviews it every year.

The math in Steps 3 and 4 is straightforward. The mistakes students make almost always happen in Steps 2 and 3, specifically in the two rules we cover in the next section.

4. The Two Rules That Determine Whether Your Analysis Is Correct

Most mesh analysis errors come down to one of two mistakes. Get these two rules down solid before exam day and your chances of solving mesh problems correctly go up fast.

Rule 1: Assign the Same Current Direction to All Loops

Every mesh current in the circuit has to go the same rotational direction, either all clockwise or all counterclockwise. Most textbooks default to clockwise, and that is a perfectly reasonable choice.

What you cannot do is assign clockwise to one loop and counterclockwise to another. This is the most common mesh analysis mistake, and it is easy to make under exam pressure, especially when you are running on recall rather than a solid understanding of why the rule exists.

📌 Rule 1: Direction Consistency

✅ All loops clockwise, correct
✅ Or All loops counterclockwise, correct
❌ Loop 1 clockwise, Loop 2 counterclockwise, incorrect

This rule applies regardless of how many loops the circuit has. No exceptions.

This is not in the FE Reference Handbook and it is not on any formula sheet. This one comes from understanding the method, not memorizing it.

Rule 2: Handle the Shared Middle Branch Correctly

When two mesh loops share a common branch, a resistor in the middle of the circuit that both

$I_1 $ and $I_2 $ pass through, the voltage drop across that resistor has to be written carefully in your KVL equation.

Here is where students go wrong. When you write the voltage drop across the shared resistor, do you use $(I_1 – I_2) \times R $ or $(I_2 – I_1) \times R $

The answer depends entirely on which loop’s equation you are writing at that moment.

📌 Rule 2: Shared Branch Current Convention

When writing the KVL equation for Loop 1 (mesh current I1):

Voltage drop across shared resistor = $(I_1 – I_2) \times R $

When writing the KVL equation for Loop 2 (mesh current I2):

Voltage drop across shared resistor = $(I_2 – I_1) \times R $

The mesh current you are solving for always goes first. It is the dominant current in that loop’s equation.

Why does this matter so much? If you write $(I_1 – I_2) $ when the equation calls for $(I_2 – I_1) $, or the other way around, your KVL equation is wrong from that point on. And that mistake does not announce itself. Your analysis keeps going, the calculator spits out a number, and that wrong number may sit right there as one of the four answer choices on the exam.

⚠️ The 25% Probability Problem

If you guess the shared branch direction for Loop 1, and guess again for Loop 2, your odds of getting both right by chance are 0.5 × 0.5 = 0.25, or 25%.

That is exactly the same as randomly picking one of four answer choices without solving anything at all.

What makes it worse is the time. If shaky knowledge of this rule costs you 5-6 minutes on the problem and you still get it wrong, you lose both the point and the time. That is a worse outcome than skipping the question entirely and moving on.

This is why really understanding how mesh analysis works, not just recognizing the pattern, is what keeps you out of that trap.

5. Passive Sign Convention in KVL Loop Equations

Before writing any KVL equation, you have to correctly classify each element in the loop as either a voltage gain or a voltage drop. This comes down to the passive sign convention, the same rule covered in the KCL guide.

Here is how it applies within mesh analysis:

Resistors: Always a Voltage Drop

A resistor never produces a voltage gain. Every resistor in every loop, in every circuit, always lands on the voltage drop side of your KVL equation. No exceptions.

📌 Resistors in KVL

Every resistor is always a voltage drop. No exceptions. See a resistor in your loop, it goes on the drop side of the equation, full stop.

Voltage Sources: Gain or Drop Depends on Current Direction

A voltage source can appear as either a gain or a drop in a KVL equation. The passive sign convention determines which:

Voltage GAIN: Mesh current enters the negative terminal and leaves the positive terminal of the source.

Voltage DROP: Mesh current enters the positive terminal and leaves the negative terminal of the source.

The common mistake: most students assume a voltage source is always a gain. That is not correct. Whether a battery acts as a gain or a drop comes down entirely to which way the mesh current is moving relative to its terminal polarity. The same battery source can be a gain in one circuit and a drop in another.

6. Fully Worked Practice Problem: Two-Loop Mesh Analysis

The problem: Find mesh currents $I_1 $ and $I_2 $ for the two-loop circuit described above.

Step 1: Identify the Meshes and Assign Currents

The circuit has two independent loops. Assign mesh currents $I_1 $ to the left loop and $I_2 $ to the right loop, both clockwise.

Step 2: Classify Each Element Using Passive Sign Convention

Before writing any equation, classify every element in each loop as a gain or a drop.

For Loop 1 ( $I_1 $, clockwise):

45V source: $I_1 $ enters the negative terminal and leaves the positive terminal → Voltage GAIN
$2\,\Omega $ resistor: always a voltage drop → Voltage DROP
$4\,\Omega $ resistor: always a voltage drop → Voltage DROP
$12\,\Omega $ shared resistor: always a voltage drop → Voltage DROP (with shared branch handling)

For Loop 2 ($I_2 $, clockwise):

30V source:$I_2 $ enters the positive terminal and leaves the negative terminal → Voltage DROP
$9\,\Omega $ resistor: always a voltage drop → Voltage DROP
$3\,\Omega $ resistor: always a voltage drop → Voltage DROP
$12\,\Omega $ shared resistor: always a voltage drop → Voltage DROP (with shared branch handling)

Step 3: Write the KVL Equation for Loop 1

Put all voltage gains on the left side and all voltage drops on the right side.

Voltage gains in Loop 1: 45V (from the 45V source)

Voltage drops in Loop 1: $I_1 \times 2\,\Omega + I_1 \times 4\,\Omega + (I_1 – I_2) \times 12\,\Omega $

Note: the shared $12\,\Omega $ branch uses $(I_1 – I_2) $ because we are writing the equation for Loop 1. $I_1 $ is the dominant current.

$45 = I_1 \times 2\,\Omega + I_1 \times 4\,\Omega + (I_1 – I_2) \times 12\,\Omega $

Expanded Form: 45 = 2·i1 + 4·i1 + 12·i1 − 12·i2 → 45 = 18·i1 − 12·i2.

This is the standard form for calculator entry.

Step 4: Write the KVL Equation for Loop 2

For Loop 2, the 30 V source is a voltage drop $I_2 $ enters the positive terminal). All elements are dropped here. With no gains, the left side of the equation equals zero.

Voltage gains in Loop 2: None (the 30V source is a drop here)

Voltage drops in Loop 2: $I_2 \times 9\,\Omega + 30\,\text{V} + I_2 \times 3\,\Omega + (I_2 – I_1) \times 12\,\Omega $

Note: The shared $12\,\Omega $ branch uses $(I_2 – I_1) $ because we are writing the Loop 2 equation.$I_2 $ is the dominant current.

$0 = (I_2 \times 9) + 30 + (I_2 \times 3) + (I_2 – I_1) \times 12 $

Expanded Form: 0 = 9·i2 + 30 + 3·i2 + 12·i2 − 12·i1 → 0 = −12·i1 + 24·i2 + 30, which rearranges to −30 = −12·i1 + 24·i2.

Present both the raw KVL form and the simplified standard form for calculator entry.

Step 5: System of Equations

You now have two equations and two unknowns $I_1 $ and $I_2 $:

System of Equations

Equation 1 (Loop 1): $18 I_1 – 12 I_2 = 45 $

Equation 2 (Loop 2): $-12 I_1 + 24 I_2 = -30 $

Enter these into the simultaneous equation solver on NCEES®-approved calculator (TI-36X Pro/ Casio fx-115ES Plus / fx-991ES Plus/ Casio fx-991EX / fx-991CW (ClassWiz). With exam-day familiarity, this step takes 30–60 seconds.

Enter these into the simultaneous equation solver on your NCEES®-approved calculator.

TI-36X Pro:

Press [2nd] then [sys-solv] to open the system of linear equations solver.
Arrow to 2×2 LIN EQS and press [enter].
Enter the first equation, pressing [enter] after each number: a1 = 18, b1 = −12, c1 = 45. Use the (−) negative key for −12.
Enter the second equation: a2 = −12, b2 = 24, c2 = −30.
Arrow down to SOLVE and press [enter].
Read the screen: x = $I_1 $ and y = $I_2 $

Casio fx-115ES Plus / fx-991ES Plus:

Press [MODE], then [5] to open EQN.
Press [1] to pick the two-unknown form.
Enter the coefficients, pressing [=] after each: 18, −12, 45, then −12, 24, −30. Use the (−) negative key for the negatives.
Press [=]. The screen shows X. Press [=] again to see Y.

Casio fx-991EX / fx-991CW (ClassWiz):

Press [MENU], choose Equation, then Simultaneous, then 2 unknowns.
Enter the coefficients: 18, −12, 45, then −12, 24, −30. Use the (−) negative key for the negatives.
Press [=] to show the solution. Press [=] again to toggle between x and y.

Step 6: Results

Unknown	Value	Interpretation
$I_1 $	+ 2.5 A	Mesh current in the left loop (clockwise)
$I_2 $	0 A	Mesh current in the right loop (no current flowing)

Step 7: What Does $I_2 = 0 $ Mean?

💡 When a Mesh Current Equals Zero

$I_2 = 0 $ means no current is flowing in the right loop. That is the same thing as an open circuit in that branch. It is not a mistake, it is a valid result that came straight out of the math. The circuit simply does not push current through that loop with these source values.

Always do a quick sanity check: does the result make physical sense? If $I_2 = 0 $ , there is no voltage drop across the $9\,\Omega $ or $3\,\Omega $ resistors in that loop.

7. Common Mesh Analysis Mistakes on the FE Exam

Mistake	Why It Matters	How to Avoid It
Mixing clockwise and counterclockwise loop directions	Produces incorrect KVL equations that can NOT be corrected by arithmetic	Assign all directions before writing any equations, and double check before moving on
Wrong sign on the shared branch: using $(I_2 – I_1) $ when writing Loop 1’s equation	Gives a plausible but incorrect answer, the examiners put this in as a distractor	Always write the current of the loop you are solving first: Loop 1 → $(I_1 – I_2) $ Loop 2 → $(I_2 – I_1) $
Treating a voltage source as always a gain	Violates the passive sign convention, one sign error carries through the full solution	Check which way the mesh current flows through each source before classifying it as a gain or a drop
Forgetting that resistors are always drops	Sometimes misclassified as gains when sitting near a voltage source	No resistor ever produces a gain. If you see a resistor, it is a drop, period
Not setting up standard form before calculator entry	Entry errors when the equation is not in ax + by = c form	Expand and collect terms before entering into the calculator simultaneous solver
Applying mesh analysis to a circuit with current sources without using supermesh	Current sources break the standard KVL setup, extra steps are needed	Spot current sources early. If one is there, use KCL instead or handle it with the supermesh technique

8. KVL vs. KCL: The Bottom Line

Mesh analysis (KVL) is a useful secondary technique. There are circuits where it is faster and more direct than KCL, especially clean two-loop circuits with only voltage sources. When the circuit fits, it is worth using.

But KCL is still the technique you should get solid on first and trust most. Here is why:

KCL works on every circuit. Mesh analysis needs the right circuit topology.

KCL errors are easier to catch. Mesh sign errors can give you a wrong answer that looks right.

KCL carries over more directly to PE Power topics. Per-unit systems, symmetrical components, and fault analysis are all closer to nodal analysis than loop analysis.

Know both. Get KCL down cold. Understand mesh well enough to use it confidently when it is the faster path.

Frequently Asked Questions

Is mesh analysis in the FE Reference Handbook?

No. Mesh analysis is not mentioned in the FE Reference Handbook. KVL is stated, but the step-by-step mesh procedure, including the direction consistency rule and the shared branch convention, is not covered. You have to walk into the exam with this method built in through practice.

Do I need to use mesh analysis on the FE exam, or can I always use KCL?

You can always use KCL. There is no circuit on the FE exam that requires mesh analysis specifically. But there are circuits where mesh is faster, and on a timed exam, spotting those circuits and switching techniques can save you real time. Learn both methods and use each one where it gives you the fastest path to the answer.

What happens if I assign $I_1 $ counterclockwise and $I_2 $ clockwise?

Your KVL equations will be wrong. The shared branch term, which depends on the relationship between the two mesh currents, will have the wrong sign, and the system of equations will give you wrong values for $I_1 $ and $I_2 $ . This is one of the most common reasons students get mesh problems wrong even after putting full effort into the solution. Always assign the same direction to all loops.

If $I_2 $ comes out as zero, did I make an error?

Not necessarily. A mesh current of zero is a valid result. It means no current is flowing in that loop with the given source values, and physically that branch is acting like an open circuit. Check whether the result makes sense physically, then use $I_2 = 0 $ in any later calculations. All voltage drops in that loop from its own current will be zero.

How does mesh analysis relate to the PE Power exam?

Mesh analysis is not directly tested on the PE Power exam, but the KVL principles behind it carry forward. Power flow equations, three-phase circuit analysis, and certain protection coordination calculations all involve loop equations and sign conventions. A solid understanding of KVL, including the passive sign convention applied to voltage sources, makes these PE Power topics a lot easier to work through.

Wasim Asghar - P.E, P.ENG, M.ENG

Licensed Professional Engineer in Texas (PE), Florida (PE) and Ontario (P. Eng) with consulting experience in design, commissioning and plant engineering for clients in Energy, Mining and Infrastructure.